- 1 - e08653 this ic is esd sensitive device. s pecial handling precautions are required. sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illu strating the operation of the devices. sony cannot as sume responsibility for any problems aris ing out of the use of these circuits. CXM3540XR high linearity dp4t antenna sw itch for gsm/umts/cdma description the CXM3540XR is a high power and high linearity dp 4t antenna switch for gsm/umts/cdma applications. the low insertion loss on transmit means increased talk time as the tx power amplifier can be operated at a lower output level. the integrated logic decoder reduces component count and si mplifies pcb layout by allowing direct connection of the switch to digital base band control lines with the cmos logic levels. sony gaas jphemt mmic process is used. (applications: gsm/umts gsm/cdma dual mode handsets, cdma handsets, umts handsets) features ? low insertion loss: 0.30db (typ.) @34dbm (cellular band) 0.35db (typ.) @32dbm (pcs band) ? high linearity: iip3 = 70dbm ? low voltage operation v dd = 2.5v ? no dc blocking capacitors ? lead-free and rohs compliant package small package 22-pin xqfn (2.4mm 3.3mm 0.35mm) (typ.) structure gaas jphemt mmic
CXM3540XR - 2 - absolute maximum ratings *1 25mm 25mm t: 0.8mm mounted on standard board (fr-4) ? bias voltage v dd 4 v (ta = 25 c) ? control voltage vctl 4 v (ta = 25 c) ? input power max. 35.5 dbm (824 to 915mhz, ta = 25 c) [duty cycle = 12.5% to 50%] 34 dbm (1710 to 1910mhz, ta = 25 c) [duty cycle = 12.5% to 50%] 32 dbm (1920 to 1980mhz, ta = 25 c) ? operating temperature ?35 to +85 c ? storage temperature ?65 to +150 c ? maximum power dissipation pd 500 mw *1
CXM3540XR - 3 - block diagram pin configuration f1 f9 rf1 rf5 rf2 rf3 rf4 f2 f10 f3 f11 f4 f12 f8 f7 f6 f5 rf6 ctlc ctlb ctla v dd 6 4 5 8 3 1 2 9 10 11 13 15 14 16 18 17 22 21 20 19 gnd rf6 gnd gnd rf5 gnd gnd gnd rf3 gnd rf4 gnd gnd ctld xqfn-22p pkg (2.4mm 3.3mm 0.4mm max.) top view 7 12 rf2 gnd rf1 gnd
CXM3540XR - 4 - pin description truth table dc bias condition (ta = 25 c) pin no. symbol pin no. symbol 1ctld 12gnd 2 gnd 13 rf6 3gnd 14gnd 4rf4 15gnd 5 gnd 16 rf5 6rf3 17gnd 7gnd 18gnd 8rf2 19v dd 9 gnd 20 ctla 10 rf1 21 ctlb 11 gnd 22 ctlc state ctla ctlb ctlc ctld active path f1 f2 f3 f4 f5 f6 f7 f8 f9 f10 f11 f12 f13 f14 1 l l h l rf5-rf1 on off off off off off off off off on on on off on 2 l l h h rf5-rf2 off on off off off off off off on off on on off on 3 l h h l rf5-rf3 off off on off off off off off on on off on off on 4 h l h l rf5-rf4 off off off on off off off off on on on off off on 5 l l l l rf6-rf1 off off off off on off off off off on on on on off 6 l l l h rf6-rf2 off off off off off on off off on off on on on off 7 l h l l rf6-rf3 off off off off off off on off on on off on on off 8 h l l l rf6-rf4 off off off off off off off on on on on off on off item min. typ. max. unit vctl (h) 1.5 1.8 3.2 v vctl (l) 0 ? 0.3 v dd 2.5 2.8 3.2
CXM3540XR - 5 - electrical characteristics (ta = +25 c, v dd = 2.8v, vctl = 0/1.8v) electrical characteristics are measured with all rf ports terminated in 50 . *1 pin = 34dbm, f = 824 to 960mhz *2 pin = 32dbm, f = 1710 to 1990mhz *3 pin = 10dbm, f = 2110 to 2170mhz *4 ptx = 21.5dbm, pjam = ?15dbm, ftx = 835mhz, fjam = 790mhz, fim = 880mhz *5 ptx = 21.5dbm, pjam = ?15dbm, ftx = 1950mhz, fjam = 1760mhz, fim = 2140mhz *6 pin = 27 + 27dbm, 835 + 836mhz, iip3 = (3 pout ? im3)/2 + loss *7 pin = 27 + 27dbm, 1950 + 1951mhz, iip3 = (3 pout ? im3)/2 + loss *8 measured with recommended circuit *9 pin = 25dbm, f = 890 to 930mhz *10 pin = 25dbm, f = 1920 to 1980mhz item symbol path condition min. typ. max. unit insertion loss il rf5 - rf1, 2, 3, 4 rf6 - rf1, 2, 3, 4 *1 0.30 0.45 db 1575.42mhz 0.30 0.45 *2 0.35 0.50 *3 0.40 0.55 isolation iso. rf5 - rf1, 2, 3, 4 rf6 - rf1, 2, 3, 4 *1 25 38 db 1575.42mhz 24 36 *2 22 35 *3 21 30 vswr vswr 824 to 2170mhz 1.1 ? harmonics 2fo rf5 - rf1, 2, 3, 4 rf6 - rf1, 2, 3, 4 *1 ?60 ?36 dbm 3fo ?45 ?36 2fo *2 ?60 ?36 3fo ?45 ?36 2fo *9 ?95 ?75 dbc 3fo ?90 ?75 2fo *10 ?95 ?75 3fo ?90 ?75 p 0.2db compression input power p 0.2db rf5 - rf1, 2, 3, 4 rf6 - rf1, 2, 3, 4 824 to 930mhz 35.5 dbm 1710 to 1980mhz 33.5 imd3 imd3 rf5 - rf1, 2, 3, 4 rf6 - rf1, 2, 3, 4 *4 , *8 ?110 dbm *5 , *8 ?110 input ip3 iip3 rf5 - rf1, 2, 3, 4 rf6 - rf1, 2, 3, 4 *6 , *8 65 70 dbm *7 , *8 65 70 control current ictl vctl = 1.8v 0.005 10 a supply current idd v dd = 2.8v 0.15 0.3 ma switching speed swt v dd = 2.8v, vctl = 0v/1.8v 25 s
CXM3540XR - 6 - recommended circuit note) 1. no dc blocking capacitors are required on all rf ports. 2. dc levels of all rf ports are gnd. 3. l1, l2, c1 and c2 are recommended on ant port for esd protection. ctlc ctlb ctla v dd 6 4 5 8 3 1 2 9 10 11 13 15 14 16 18 17 22 21 20 19 gnd rf6 l2 c2 l1 c1 gnd gnd rf5 gnd gnd gnd rf3 gnd rf4 gnd gnd ctld xqfn-22p pkg (2.4mm 3.3mm 0.4mm max.) top view 7 12 rf2 gnd rf1 gnd
CXM3540XR - 7 - sony corporation package outline (unit: mm) lead plating specifications item lead material copper alloy solder composition sn-bi bi:1-4wt% plating thickness 5-18m spec.
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